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  ? semiconductor components industries, llc, 2014 august, 2014 ? rev. 1 1 publication order number: NTR5198NL/d NTR5198NL power mosfet 60 v, 155 m  , single n?channel logic level, sot?23 features ? small footprint industry standard surface mount sot?23 package ? low r ds(on) for low conduction losses and improved efficiency ? these devices are pb?free, halogen free/bfr free and are rohs compliant maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source v oltage v dss 60 v gate?to?source v oltage v gs 20 v continuous drain current r  j?mb (notes 1, 2, 3, and 4) steady state t a = 25 c i d 2.2 a t a = 100 c 1.6 power dissipation r  j?mb (notes 1 and 3) t a = 25 c p d 1.5 w t a = 100 c 0.6 continuous drain current r  ja (note 1, 2, 3, and 4) steady state t a = 25 c i d 1.7 a t a = 100 c 1.2 power dissipation r  ja (notes 1 and 3) t a = 25 c p d 0.9 w t a = 100 c 0.4 pulsed drain current t a = 25 c, t p = 10  s i dm 27 a operating junction and storage temperature t j , t stg ?55 to 150 c source current (body diode) i s 1.9 a lead temperature for soldering purposes (1/8? from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. the entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. psi (  ) is used as required per jesd51?12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. surface?mounted on fr4 board using a 650 mm2, 2 oz. cu pad. 4. maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. g d s device package shipping ? ordering information http://onsemi.com 60 v 205 m  @ 4.5 v 155 m  @ 10 v r ds(on) typ 2.2 a i d max v (br)dss sot?23 case 318 style 21 marking diagram/ pin assignment 2 1 3 n?channel NTR5198NLt1g sot?23 (pb?free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. aa6 = device code m = date code*  = pb?free package (note: microdot may be in either location) *date code orientation may vary depending upon manufacturing location. 3 drain 1 gate 2 source aa6 m   NTR5198NLt3g sot?23 (pb?free) 10000 / tape & reel
NTR5198NL http://onsemi.com 2 thermal resistance ratings parameter symbol max unit junction?to?lead #3 ? drain (notes 2 and 3) r  j?mb 86 c/w junction?to?ambient ? steady state (note 3) r  ja 139 c/w electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test conditions min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250  a 60 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j reference to 25 c, i d = 250  a 70 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 60 v t j = 25 c 1.0  a t j = 125 c 10 gate?to?source leakage current i gss v ds = 0 v, v gs =  20 v  100 na on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = 250  a 1.5 2.5 v threshold temperature coefficient v gs(th) /t j reference to 25 c, i d = 250  a ?6.5 mv/ c drain?to?source on?resistance r ds(on) v gs = 10 v, i d = 1 a 107 155 m  v gs = 4.5 v, i d = 1 a 142 205 forward transconductance g fs v ds = 5.0 v, i d = 1 a 3 s charges, capacitances & gate resistance input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 25 v 182 pf output capacitance c oss 25 reverse transfer capacitance c rss 16 total gate charge q g(tot) v ds = 48 v, i d = 1 a v gs = 4.5 v 2.8 nc v gs = 10 v 5.1 threshold gate charge q g(th) v ds = 48 v, i d = 1 a v gs = 10 v 0.3 gate?to?source charge q gs 0.8 gate?to?drain charge q gd 1.5 plateau voltage v gp 3.1 v gate resistance r g 8  switching characteristics (note 6) turn?on delay time t d(on) v ds = 30 v, v gs = 10 v, i d = 1 a, r g = 10  5 ns rise time t r 7 turn?off delay time t d(off) 13 fall time t f 2 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 1 a t j = 25 c 0.8 1.2 v t j = 125 c 0.6 reverse recovery time t rr i s = 1 a dc , v gs = 0 v dc , di s /dt = 100 a/  s 12 ns charge time t a 9 discharge time t b 3 reverse recovery stored charge q rr 6 nc 5. pulse test: pulse width  300  s, duty cycle  2%. 6. switching characteristics are independent of operating junction temperatures.
NTR5198NL http://onsemi.com 3 typical characteristics figure 1. on?region characteristics figure 2. transfer characteristics v ds , drain?to?source voltage (v) v gs , gate?t o?source voltage (v) 5 4 3 2 1 0 0 1 2 3 4 4 3 1 0 2 4 6 15 figure 3. on?resistance vs. gate?to?source voltage figure 4. on?resistance vs. drain current and gate voltage v gs , gate voltage (v) i d , drain current (a) 10 9 8 7 6 5 3 0.05 0.10 0.15 0.30 0.35 0.45 0.50 2 1 0 0.05 0.10 0.25 0.35 0.40 0.50 figure 5. on?resistance variation with temperature figure 6. breakdown voltage variation with temperature t j , junction temperature ( c) t j , junction temperature ( c) 150 125 100 50 25 0 ?25 ?50 0.6 1.0 1.5 2.0 100 50 0 ?25 ?50 0.900 1.000 i d , drain current (a) i d , drain current (a) r ds(on) , drain?to?source resistance (  ) r ds(on) , drain?to?source resistance (  ) r ds(on) , drain?to?source resistance (normalized) bv dss , normalized breakdown voltage 0.20 0.40 75 i d = 250  a v gs = 4.5 v t j = 25 c v ds = 5 v t j = 150 c t j = ?55 c i d = 1 a t j = 25 c t j = 25 c v gs = 10 v v gs = 4.5 v i d = 1 a v gs = 10 v v gs = 6.0 v v gs = 3.4 v v gs = 3.2 v v gs = 3.8 v 4 0.25 3 0.15 0.20 0.30 0.45 5 6 7 8 9 10 11 12 13 14 15 v gs = 5.0 v v gs = 10 v v gs = 3.6 v v gs = 3.0 v v gs = 4.0 v 25 1 3 5 7 8 10 12 9 11 13 14 5 468 7911 10 12 14 13 15 0.7 0.8 0.9 1.1 1.2 1.3 1.4 1.6 1.7 1.8 1.9 25 75 125 150 0.925 0.950 0.975 1.025 1.050 1.075 1.100 1.125 1.150
NTR5198NL http://onsemi.com 4 typical characteristics q t figure 7. threshold voltage variation with temperature figure 8. drain?to?source leakage current vs. voltage t j , junction temperature ( c) v ds , drain?to?source voltage (v) 150 100 25 ?25 ?50 0.60 0.80 1.00 1.20 60 35 5 0 1 10 100 1000 10,000 figure 9. capacitance variation figure 10. gate?to?source and drain?to?source voltage vs. total charge v ds , drain?to?source voltage (v) q g , total gate charge (nc) 60 10 0 0 25 275 5.5 1.0 0.5 0 0 1 3 5 7 9 12 v gs(th) , normalized threshold voltage i dss , leakage (na) c, capacitance (pf) v gs , gate?t o?source voltage (v) t j = 25 c f = 1 mhz v gs = 0 v c iss 2 4 6 8 10 i d = 250  a 0 50 75 125 0.70 0.90 1.10 0.65 0.85 1.05 0.75 0.95 1.15 figure 11. resistive switching time variation vs. gate resistance figure 12. diode forward voltage vs. current r g , gate resistance (  ) v sd , source?to?drain voltage (v) 100 10 1 0.1 10 100 1.1 1.0 0.5 0.4 0.1 10 t, time (ns) i s , source current (a) v dd = 30 v i d = 1 a v gs = 10 v t r t f t d(off) t d(on) 1 10 15 20 25 30 40 50 45 55 t j = 85 c t j = 125 c t j = 150 c 520 15 30 25 40 35 45 55 50 50 75 100 125 150 175 200 225 250 c oss c rss 11 1.5 2.5 2.0 3.0 3.5 4.0 4.5 5.0 v ds = 48 v i d = 1 a t j = 25 c 0 5 15 25 35 45 60 10 20 30 40 50 55 v ds , drain?to?source voltage (v) v gs v ds q gs q gd 1 t j = 25 c t j = 125 c t j = 150 c t j = 85 c t j = ?55 c t j = 100 c 0.6 0.7 0.8 0.9
NTR5198NL http://onsemi.com 5 typical characteristics t, time (sec) 1 0.1 10 0.01 100 0.00001 1000 0.000001 1 100 1000 r(t), effective transient thermal response ( c/w) 0.001 0.0001 single pulse 50% duty cycle 20% 10% 5% 2% 1% 10 figure 13. maximum rated forward biased safe operating area v ds , drain?to?source voltage (v) 100 10 1 0.1 0.01 0.1 1 10 100 i d , drain current (a) v gs 10 v single pulse t c = 25 c 10  s 100  s 1 ms 10 ms dc r ds(on) limit thermal limit package limit figure 14. thermal impedance (junction?to?ambient) r  ja steady state = 139 c/w
NTR5198NL http://onsemi.com 6 package dimensions sot?23 (to?236) case 318?08 issue ap d a1 3 12 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, protrusions, or gate burrs.  mm inches  scale 10:1 0.8 0.031 0.9 0.035 0.95 0.037 0.95 0.037 2.0 0.079 soldering footprint* view c l 0.25 l1  e e e b a see view c dim a min nom max min millimeters 0.89 1.00 1.11 0.035 inches a1 0.01 0.06 0.10 0.001 b 0.37 0.44 0.50 0.015 c 0.09 0.13 0.18 0.003 d 2.80 2.90 3.04 0.110 e 1.20 1.30 1.40 0.047 e 1.78 1.90 2.04 0.070 l 0.10 0.20 0.30 0.004 0.040 0.044 0.002 0.004 0.018 0.020 0.005 0.007 0.114 0.120 0.051 0.055 0.075 0.081 0.008 0.012 nom max l1 h 2.10 2.40 2.64 0.083 0.094 0.104 h e 0.35 0.54 0.69 0.014 0.021 0.029 c 0 ??? 10 0 ??? 10  style 21: pin 1. gate 2. source 3. drain *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 NTR5198NL/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative


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